(en)A system and method for establishing communication between a controller and a plurality of inverters comprises determining a response time window length and broadcasting a response request to the array of inverters that includes the response time window length. Each inverter, in response to receiving the response requests, transmits a response to the controller at a randomly determined response time within the response time window. In response to receiving an acknowledgement from the controller, the responding inverter may ignore subsequent response requests. The controller may adjust the response time window and broadcasts the new response time window until no inverter response is received for a pre-determined number of response time windows.

1.ApplicationNumber: US-90204610-A
1.PublishNumber: US-2012089260-A1
2.Date Publish: 20120412
3.Inventor: KROHNE EDWARD
KUHN BRIAN T.

4.Inventor Harmonized: KROHNE EDWARD(US)
KUHN BRIAN T(US)

5.Country: US
6.Claims:
(en)A system and method for establishing communication between a controller and a plurality of inverters comprises determining a response time window length and broadcasting a response request to the array of inverters that includes the response time window length. Each inverter, in response to receiving the response requests, transmits a response to the controller at a randomly determined response time within the response time window. In response to receiving an acknowledgement from the controller, the responding inverter may ignore subsequent response requests. The controller may adjust the response time window and broadcasts the new response time window until no inverter response is received for a pre-determined number of response time windows.

7.Description:
(en)TECHNICAL FIELD
The present disclosure relates, generally, to power converters for converting direct current (DC) power to alternating current (AC) power and, more particularly, to systems and methods for controlling and communicating with such power converters.
BACKGROUND
Power inverters convert a DC power to an AC power. For example, some power inverters are configured to convert the DC power to an AC power suitable for supplying energy to an AC grid and, in some cases, an AC load coupled to the AC grid. One particular application for such power inverters is the conversion of DC power generated by an alternative energy source, such as photovoltaic cells (“PV cells” or “solar cells”), fuel cells, DC wind turbine, DC water turbine, and other DC power sources, to a single-phase AC power for delivery to the AC grid at the grid frequency.
In an effort to increase the amount of AC power generated, a large number of power inverters may be used in a particular application. In some implementations, each power inverter is incorporated or otherwise associated with an alternative energy source to form an alternative energy source module. Such modules are typically located in remote or otherwise difficult to reach location (e.g., a solar cell panel located on a roof). As such, communicating with and/or controlling the inverters may be accomplished remotely. However, in many implementations, the identity and number of inverters used is unknown and/or may change over time thereby increasing the difficulty of establishing and maintaining communication and control of the inverters.
SUMMARY
According to on aspect, a method for establishing communication with a plurality of inverters, which may be configured to convert direct current (DC) power generated from an alternative source to alternating current (AC) power, may include determining an initial length of a response time window. The method may also include broadcasting a response request to each inverter of the plurality of inverters that prompts the inverter to respond. The response request may include the length of the response time window. Additionally, the method may include, in response to receiving a response from at least one inverter during the response time window, (i) recording an identification of the at least one inverter and (ii) transmitting an acknowledgement to the at least one inverter using the identification. Further, the method may include, in response to the response time window expiring, (i) adjusting the length of the response time window and (ii) broadcasting another response request that includes the adjusted length of the response time window to each inverter of the plurality of inverters.
In some embodiments, determining the initial length of the response time window may include determining the initial length based on a predetermined length of time required by an inverter of the plurality of inverters to transmit a response to the response request. Additionally, in some embodiments, determining the initial length of the response time window may include determining an initial length of the response time window that is a multiple of the predetermined length of time required by the inverter to transmit the response to the response request. Additionally, broadcasting the response request may include broadcasting the response request over an AC power line using a power line communication protocol.
Additionally, in some embodiments, receiving a response from the at least one inverter may include receiving a response that includes an identification number that uniquely identifies the responding inverter from the other inverters of the plurality of inverters and facilitates directed communication with the responding inverter using the identification number. Further, transmitting the acknowledgement to the at least one inverter may include transmitting the acknowledgement after expiration of the time window. Additionally, in some embodiments, adjusting the length of the response time window may include decreasing the length of the response time window by a multiple of a predetermined length of time required by an inverter of the plurality of inverters to transmit a response to the response request. Further, in some embodiments, adjusting the length of the response time window may include increasing the length of the response time window in response to a number of communication collisions during the response time window being greater than a predetermined value.
Additionally, the method may include incrementing a counter in response to not receiving a response from at least one inverter of the plurality of inverters during the response time window. In such embodiments, broadcasting another response request may include broadcasting another response request in response to the counter being less than a maximum threshold value. Additionally, in some embodiments, the method may further include stopping the broadcast of response requests in response to the counter being equal to a maximum threshold value. Alternatively, in some embodiments, the method may include incrementing a counter in response to not receiving a response from at least one inverter of the plurality of inverters during the time window and repeating the adjusting step, the broadcasting another response step, and the incrementing step until the counter equals a predetermined threshold value.
According to another aspect, a controller for communicating with a plurality of inverters over an alternating current (AC) power line may include a communication circuit, a processor communicatively coupled to the communication circuit, and a memory communicatively coupled to the processor. The inverters may be configured to convert direct current (DC) power from an alternative energy source to AC power. The communication circuit may be configured to communicate with the plurality of inverters over the AC power line using a power line communication protocol. The memory may have stored therein a plurality of instructions, which when executed by the processor, result in the processor determining an initial length of a response time window. Additionally, the plurality of instructions may result in the processor broadcasting, using the communication circuit, a response request to each inverter of the plurality of inverters that prompts the inverter to respond, the response request including the length of the response time window. Further, in response to receiving a response from at least one inverter during the response time window, the plurality of instructions may result in the processor (i) storing an identification of the at least one inverter in the memory and (ii) transmitting an acknowledgement, using the communication circuit, to the at least one inverter using the identification. Yet further, in response to the response time window expiring, the plurality of instructions may result in the processor (i) adjusting the length of the response time window and (ii) broadcasting another response request, using the communication circuit, that includes the adjusted length of the response time window to each inverter of the plurality of inverters.
In some embodiments, determining the initial length of the response time window may include determining the initial length based on a predetermined length of time required by an inverter of the plurality of inverters to transmit a response to the response request. Additionally, in some embodiments, adjusting the length of the response time window may include decreasing the length of the response time window by a multiple of a predetermined length of time required by an inverter of the plurality of inverters to transmit a response to the response request. Further, in some embodiments, the plurality of instructions may further result in the processor incrementing a counter in response to not receiving a response from at least one inverter of the plurality of inverters during the response time window. In such embodiments, broadcasting another response request may include broadcasting another response request in response to the counter being less than a maximum threshold value.
In some embodiments, the plurality of instructions further may result in the processor stopping the broadcast of response requests in response to the counter being equal to a maximum threshold value. Additionally, in some embodiments, the plurality of instructions further result in the processor incrementing a counter in response to not receiving a response from at least one inverter of the plurality of inverters during the time window and repeating the adjusting step, the broadcasting another response step, and the incrementing step until the counter equals a predetermined threshold value.
According to a further aspect, a method for establishing communication between a controller and a plurality of inverters, which may be configured to convert direct current (DC) power from an alternative energy source to AC power, may include receiving with an inverter a response request transmitted by the controller, the response request including a length of a response time window. Additionally, the method may include determining a random response time for the inverter based on the length of the response time window and transmitting a response to the controller at the response time. The response may include an identification of the inverter. The method may also include, in response to receiving an acknowledgement from the controller in response to the transmitted response, ignoring subsequent response requests from the controller.
In some embodiments, receiving a response request may include receiving a response request that was broadcast from the controller over an alternating current (AC) power line using a power line communication protocol. Additionally, determining a response time may include determining a response time that is within the response time window. For example, in some embodiments, determining a random response time may include determining a random response time that is a multiple of the length of time required by the inverter to transmit a response to the response request to the controller.
In some embodiments, ignoring subsequent response requests may include ignoring subsequent response requests from the controller for a predetermined amount of time. Additionally or alternatively, ignoring subsequent response requests may include ignoring subsequent response requests from the controller until a communication from the controller is received that instructs the inverter to stop ignoring subsequent response requests. In some embodiments, the method may further include, in response to (i) not receiving an acknowledgement from the controller in response to the transmitted response and (ii) receiving a subsequent response request from the controller that includes a length of a subsequent response time window, determining a subsequent response time for the inverter based on the length of the subsequent response time window and transmitting a response to the controller at the response time, the response including the identification of the inverter.
According to yet another aspect, an inverter to convert direct current (DC) power from an alternative energy source to alternating current (AC) power may include a communication circuit, a processor communicatively coupled to the communication circuit, and a memory device communicatively coupled with the processor. The communication circuit may be configured to communicate with a controller over an AC power line using a power line communication protocol. The memory device may include therein a plurality of instructions, which when executed by the processor, result in the processor receiving a response request transmitted by the controller over the AC power line. The response request may include a length of a response time window. The plurality of instructions may also result in the processor determining a random response time for the inverter based on the length of the response time window and transmitting a response to the controller at the response time. The response may include an identification of the inverter. The plurality of instructions may further result in the processor, in response to receiving an acknowledgement from the controller in response to the transmitted response, ignoring subsequent response requests from the controller.
In some embodiments, receiving a response request may include receiving a response request that was broadcast from the controller over an alternating current (AC) power line using a power line communication protocol. Additionally, determining a random response time may include determining a random response time that is a multiple of the length of time required by the inverter to transmit a response to the response request to the controller. Further, in some embodiments, ignoring subsequent response requests may include ignoring subsequent response requests from the controller for a predetermined amount of time. Additionally or alternatively, ignoring subsequent response requests may include ignoring subsequent response requests from the controller until a communication from the controller is received that instructs the inverter to stop ignoring subsequent response requests. Further, in some embodiments, the plurality of instructions may also result in the processor, in response to (i) not receiving an acknowledgement from the controller in response to the transmitted response and (ii) receiving a subsequent response request from the controller that includes a length of a subsequent response time window, determining a subsequent response time for the inverter based on the length of the subsequent response time window and transmitting a response to the controller at the response time, the response including the identification of the inverter.



DESCRIPTION OF THE DRAWINGS
FIG. 1 is a simplified block diagram of one embodiment a system for generating alternative energy;
FIG. 2 is a simplified block diagram one embodiment of an alternative energy source module array and an alterative energy module array controller of the system of FIG. 1 ;
FIG. 3 is a simplified flow diagram of one embodiment of a method for establishing communications with an array of alternative energy modules;
FIG. 4 is a simplified flow diagram of one embodiment of a method for discovering the alternative energy modules of the alternative energy module array of FIG. 2 ; and
FIG. 5 is a simplified flow diagram of one embodiment of a method for establishing communication with the alternative energy module array controller of FIG. 2



DETAILED DESCRIPTION
While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific exemplary embodiments thereof have been shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
References in the specification to “one embodiment”, “an embodiment”, “an example embodiment”, etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
Some embodiments of the disclosure, or portions thereof, may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the disclosure may also be implemented as instructions stored on a tangible, machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; and others.
Referring to FIG. 1 , in one embodiment, a system 100 for generating alternative energy includes an array 102 of alternative energy source modules 104 and a module array controller 106 electrically coupled to each alternative energy source module 104 via an alternating current (“AC”) power line(s) 108 . The alternative energy source modules 104 are configured to convert direct current (“DC”) power from an alternative energy source to AC power, which may be supplied to a load (e.g., the utility grid) via the power line(s) 108 . In the illustrative embodiment, the alternative energy source modules 104 are embodied as photovoltaic modules configured to convert solar energy to AC power. However, in other embodiments, other types of alternative energy sources may be used such as, for example, fuel cells, DC wind turbines, DC water turbines, and/or other alternative energy sources. Additionally, although the illustrative array 102 includes four alternative energy source modules 104 , the array 102 may include more or less modules 104 in other embodiments.
The array 102 of alternative energy source modules 104 is located remotely from the module array controller 106 . For example, in the illustrative embodiment, the array 102 is attached to a roof 110 of a building 112 , such as a residential home, apartment, business, or other structure. Of course, in other embodiments, the array 102 may be positioned in other locations depending on, for example, the type of alternative energy used. Additionally, the alternative energy source modules 104 may or may not be located near each other. For example, the array 102 may be embodied as a plurality of sub-arrays, each located apart from each other and having a plurality of alternative energy source modules 104 . Additionally, although a single AC power line 108 is illustrated as coupling the modules 104 to the controller 106 in FIG. 1 , it should be appreciated that the AC power line 108 may be embodied as a plurality of AC power lines in other embodiments.
The system 100 may also include a communication gateway 114 and a network interface device 116 in some embodiments. In the illustrative embodiment, the communication gateway 114 is embodied as a wireless communication device configured to communicate with the module array controller 106 via a wireless communication link 118 . The controller 106 and the wireless communication link 118 may use any suitable wireless communication protocol to effect such communication. For example, in one embodiment, the controller 106 is configured to communicate with the communication gateway 114 using a ZigBee communication protocol. Of course, other wireless communication protocols may be used in other embodiments. Additionally, in some embodiments, the controller 106 and the communication gateway 114 may be configured to communicate using a wired communication protocol over a wired communication link (i.e., the communication link 118 is a wired communication link in such embodiments).
The communication gateway 114 is also configured to communicate with a network interface device 116 via a communication link 120 . The communication link 120 may be embodied as a wired or wireless communication link, and the communication gateway 114 may be configured to communicate with the network interface device 116 using a wired or wireless communication protocol. For example, in the illustrative embodiment, the communication gateway 114 is configured to communicate with the network interface device 116 using a ZigBee communication protocol.
The network interface device 116 is illustratively embodied as a data router, but may be embodied as other networking or communication routing devices in other embodiments. The network interface device 116 allows various computing devices to communicate with or otherwise receive data from the module array controller 106 . For example, in some embodiments, the system 100 may include a computer 122 communicatively coupled to the network interface device 116 . In such embodiments, a user (e.g., a homeowner) may use the computer 122 to interact with and/or receive data from the module array controller 106 . The computer 122 may be embodied as any type of computing device such as a desktop computer, a laptop computer, a mobile computing device, a “smart” phone, or other device capable of communicating with the network interface device 116 .
In some embodiments, the network interface device 116 is also communicatively coupled to a network 124 via a communication link 126 , which may be embodied as a wired and/or wireless communication link. The network 124 may be embodied as any number of various wired and/or wireless networks. For example, the network 124 may be embodied as or otherwise include one or more local area networks, wide area networks publicly available global networks (e.g., the Internet), or any combination thereof. Furthermore, the network 124 may include any number of additional devices to facilitate remote communication with the network interface device 116 and may support any wired and/or wireless communication protocol.
In some embodiments, the system 100 may further include remote computing devices configured to remotely communicate with the module array controller 106 and/or other devices of the system 100 . For example, the illustrative system 100 includes a data management server 128 , which may be configured to receive data from the module array controller 106 via the network 124 . Such data may include, for example, power generation data, service/maintenance data, error data, and/or any other data related to the alternative energy source modules 104 . The data management server 128 may be embodied as any type of computer server and may include any number of computers, databases, networking equipment, and/or other computing devices.
The system 100 may also include other remote computers 130 , which may operate as clients and/or servers in the system 100 . For example, the remote computers 130 may be operated by alternative energy source module installation companies to control, monitor, and/or communicate with the module array controller 106 . In this way, the installation company can monitor the performance and “health” of the alternative energy source modules 104 and controller 106 . Additionally, such computers 130 may communicate with the data management server 128 to request additional data related to the system 100 .
Referring now to FIG. 2 , as discussed above, the illustrative alternative energy source modules 104 are embodied as photovoltaic modules configured to convert solar energy to AC power. Each of the modules 104 includes a DC photovoltaic module 200 and an inverter 202 . The DC photovoltaic module 200 may be embodied as one or more photovoltaic cells and is configured to deliver DC power to the inverter 202 in response to receiving an amount of sunlight. Of course, the DC power delivered by DC photovoltaic module 200 is a function of environmental variables, such as, e.g., sunlight intensity, sunlight angle of incidence and temperature. The inverter 202 is configured to convert the DC power generated by the DC photovoltaic module 200 to AC power. In some embodiments, the inverter 202 and the DC photovoltaic module 200 are located in a common housing. Alternatively, the inverter 202 may include its own housing secured to the housing of the DC photovoltaic module 200 . Additionally, in some embodiments, the inverter 202 is separate from the housing of the DC photovoltaic module 200 , but located nearby.
The illustrative inverter 202 includes a DC-to-AC inverter 204 and an inverter controller 206 . The DC-to-AC inverter 204 is configured to convert the DC power generated by the DC photovoltaic module 200 to AC power at the grid frequency. One of a number of various inverter topologies and devices may be used in the DC-to-AC inverter 204 . Examples of inverter topologies that may be used in the inverter 204 are described in, for example, U.S. patent application Ser. No. 12/563,499, entitled “Apparatus for Converting Direct Current to Alternating Current” by Patrick L. Chapman et al., filed on Sep. 21, 2009 and in U.S. patent application Ser. No. 12/563,495, entitled “Apparatus and Method for Controlling DC-AC Power Conversion” by Patrick L. Chapman et al., filed on Sep. 21, 2009.
The operation of the inverter 204 is controlled and monitored by the inverter controller 206 . The illustrative inverter controller 206 includes a processor 210 , a memory 212 , and a communication circuit 214 . Additionally, the inverter controller 206 may include other devices commonly found in controllers, which are not illustrated in FIG. 2 for clarity of description. Such additional devices may include, for example, peripheral devices, data storage devices, input/output ports, and/or other devices.
The processor 210 of the inverter controller 206 may be embodied as any type of processor capable of executing software/firmware, such as a microprocessor, digital signal processor, microcontroller, or the like. The processor 210 is illustratively embodied as a single core processor, but may be embodied as a multi-core processor having multiple processor cores in other embodiments. Additionally, the inverter controller 206 may include additional processors 210 having one or more processor cores in other embodiments.
The memory 212 of the inverter controller 206 may be embodied as one or more memory devices or data storage locations including, for example, dynamic random access memory devices (DRAM), synchronous dynamic random access memory devices (SDRAM), double-data rate synchronous dynamic random access memory device (DDR SDRAM), flash memory devices, and/or other volatile memory devices. The memory 212 is communicatively coupled to the processor 210 via a number of signal paths, such as a data bus. Although only a single memory device 212 is illustrated in FIG. 2 , in other embodiments, the inverter controller 206 may include additional memory devices. Various data and software may be stored in the memory device 212 . For example, applications, programs, libraries, and drivers that make up the firmware executed by the processor 210 may reside in memory 212 .
The communication circuit 214 may be embodied as any number of devices and circuitry for enabling communications between the inverter 202 and the controller 106 . In the illustrative embodiment, the communication circuit 214 is configured to communicate with the controller 106 over the AC power line(s) 108 and may use any suitable power line communication protocol to effect such communication. For example, in some embodiments, the communication circuit 214 may use the CENELEC B band power line communication protocol but may use other protocols in other embodiments such as those protocols including a form of error detection and/or correction. Alternatively, in other embodiments, the communication circuit 214 may be configured to communicate with the controller 106 using a wired or wireless communication protocol. In such embodiments, the system 100 includes a suitable communication link (e.g., a dedicated communication cable) between each inverter 202 and the controller 106 .
As discussed above, the module array controller 106 is configured to monitor and/or control the operation of the alternative energy source modules 104 . The illustrative module array controller 106 includes a processor 220 , a memory 222 , and a communication circuit 224 . Additionally, the module array controller 106 may include other devices commonly found in controllers, which are not illustrated in FIG. 2 for clarity of description. Such additional devices may include, for example, peripheral devices, data storage devices, input/output ports, and/or other devices.
The processor 220 of the module array controller 106 may be embodied as any type of processor capable of executing software/firmware, such as a microprocessor, digital signal processor, microcontroller, or the like. The processor 220 is illustratively embodied as a single core processor, but may be embodied as a multi-core processor having multiple processor cores in other embodiments. Additionally, the module array controller 106 may include additional processors 220 having one or more processor cores in other embodiments.
The memory 222 of the module array controller 206 may be embodied as one or more memory devices or data storage locations including, for example, dynamic random access memory devices (DRAM), synchronous dynamic random access memory devices (SDRAM), double-data rate synchronous dynamic random access memory device (DDR SDRAM), flash memory devices, and/or other volatile memory devices. The memory 222 is communicatively coupled to the processor 220 via a number of signal paths, such as a data bus. Although only a single memory device 222 is illustrated in FIG. 2 , in other embodiments, the module array controller 106 may include additional memory devices. Various data and software may be stored in the memory device 222 . For example, applications, programs, libraries, and drivers that make up the software/firmware executed by the processor 220 may reside in memory 222 .
Similar to the communication circuit 214 , the communication circuit 224 may be embodied as any number of devices and circuitry for enabling communications between the controller 106 and the inverter 202 . In the illustrative embodiment, the communication circuit 224 is configured to communicate with the inverter 202 over the AC power line(s) 108 and may use any suitable power line communication protocol to effect such communication. For example, in some embodiments, the communication circuit 224 may use the CENELEC B power line communication protocol but may be use other protocols in other embodiments such as those protocols including a form of error detection and/or correction. Alternatively, as discussed above, the communication circuit 224 may be configured to communicate with the inverter 202 using a wired or wireless communication protocol.
In some embodiments, the module array controller 106 may also include a wireless communication circuit 226 . In such embodiments, the wireless communication circuit 226 may be embodied as any number of devices and circuitry to facilitate communication between the controller 106 and the network interface device 116 over the communication link 120 . To do so, the communication circuit 226 may use any suitable wireless communication protocol, such as a ZigBee communication protocol. Of course, as discussed above in regard to FIG. 1 , the communication circuit 226 may be configured to communicate with the network interface device 116 using a wired communication protocol and hardware. In such embodiments, the communication link 120 is embodied as or otherwise includes a wired communication link.
As discussed above, in use, the module array controller 106 is configured to establish communications with each of the inverters 202 of the array 102 of alternative energy source modules 104 . However, the controller 106 may not know the number of inverters 202 (i.e., the number of modules 104 ) or the identification (e.g., the media access control (MAC) address or other number/data required to directly communicate with each inverter 202 ) of each inverter 202 of the array 102 . As such, the controller 106 may execute a method 300 for establishing communications with the inverters 202 as illustrated in FIG. 3 . The method 300 begins with block 302 in which the controller 106 performs various initialization procedures. Such initialization procedures may include initialization of registers and devices, loading of firmware and software, and/or other procedures required to configure the controller 106 for communicating with the inverters 202 .
In block 304 , the controller 106 performs a discovery process to identify each inverter 202 of the array 102 and obtain the information necessary to directly communicate with each inverter 202 . After the discovery process is completed, the controller 106 communicates and/or controls the operation of the modules 104 (i.e., inverters 202 ) in block 306 as needed. It should be appreciated that during use, modules 104 may be added or removed from the array 102 . For example, if a module 104 , or a component of the module 104 , becomes defective, the module 104 or component thereof (e.g., inverter 202 ) may be replaced. Additionally, based on the change of power requirements, modules 104 may be added or removed from the array 102 over time. As such, the controller 106 determines if the module array has been modified in block 308 . If so, the method 300 loops back to block 304 wherein the controller 106 performs the discovery process again to determine the identity of each module 104 (i.e., inverter 202 ). If not, the method 300 loops back to block 306 wherein the controller 106 continues to communicate with the modules 104 as needed. The controller 106 may determine that the array 102 has been modified based on a direct input supplied to the controller 106 (e.g., an installer informing the controller 106 that a module 104 has been added), based on a failure to communicate with one or more modules 104 , or based on some other criteria.
Referring now to FIG. 4 , one embodiment of a method 400 for discovering each inverter 202 of the array 102 , which may be used by the controller 106 in the discovery process of block 304 of method 300 , is shown. The method 400 begins with block 402 in which the controller 106 determines an initial response time window length. The response time window represents a length of time during which the inverters 202 of the modules 104 may respond to a response request transmitted by the controller 106 as discussed in more detail below. The controller 106 may use any suitable algorithm to determine the initial length of the response time window. In one particular embodiment, the controller 106 is configured to determine the length of the response time window based on the length of time required for an inverter 202 to transmit the response to the controller 106 multiplied by the expected maximum number of modules 104 in the array 102 . For example, if the inverter 202 requires 500 milliseconds to transmit the response to the controller 106 and the expected maximum number of modules 104 in the array 102 is determined to be 200 , the controller 106 may set the initial length of the response time window to about 100 seconds (i.e., 500 milliseconds*200 modules). The length of time required by the inverter 202 to transmit the response to the controller 106 may be based on or otherwise affected by the communication protocol used, the communication circuitry used, the data size of the response, and/or other parameters. The expected maximum number of modules 104 in the array 102 may be an arbitrary maximum number or based on an estimated maximum size of the array 102 (e.g., based on a maximum physical and/or electrical capacity). Alternatively, in other embodiments, the controller 106 may be configured to simply use an arbitrary, large length of time for the initial response time window.
In block 404 , the controller 106 broadcasts a response request, which is received by each of the inverters 202 . The response request includes the length of the response time window determined in block 406 . The response request prompts each of the inverters 202 to respond to the request by transmitting identification data related to the respective inverter 202 to the controller 106 . In block 406 , the controller 106 determines whether a response has been received from one of the inverters 202 in response to the response request. If so, the controller 208 records the identification data received in the response from the inverter 202 . For example, the controller 208 may store the identification data in the memory 222 or other storage device. As discussed in more detail below, the identification data uniquely identifies the inverter 202 from the other inverters of the array 102 and allows the controller 208 to directly communicate with the responding inverter 202 (e.g., the identification data may include a MAC address associated with the responding inverter 202 ).
In block 410 , the controller 106 determines whether the response time window has expired. If not, the method 400 loops back to block 406 wherein the controller 106 again monitors for responses from the inverters 202 . However, if the controller 106 determines that the response time window has expired in block 410 , the controller 106 determines if at least one response was received from an inverter 202 in the last response time window in block 412 . If so, the controller 106 transmits an acknowledgment to each of the responding inverters 202 in block 414 . The acknowledgment may be embodied as any type of communication capable of informing the responding inverters 202 that the controller 106 has received their respective responses. As discussed in more detail below in regard to FIG. 5 , the acknowledgement may also prompt the responding inverters 202 to ignore subsequent response requests from the controller 106 .
Subsequently, in block 416 , the controller 106 adjusts the length of the response time window. In some embodiments, the controller 106 is configured to decrease the length of the response time window in block 416 . For example, the controller 106 may be configured to decrease the length of the response time window by a predetermined multiple of the length of time required by an inverter 202 to transmit a response to the response request. For example, in the example described above, the controller 106 may be configured to decrease the response time window by a multiple of 500 milliseconds (e.g., 500 ms, 1000 ms, 1500 ms, etc.), which was the length of time required for an inverter 202 to respond. In some embodiments, a minimum response time window length may be used if the adjusted would reduce the length of the response time window below a minimum length.
In other embodiments, the controller 106 may decrease the response window time by an arbitrary, predetermined amount. Additionally, in some embodiments, the adjustment made to the response time window in block 416 may be based on other criteria. For example, the adjustment may be based on the number of data collisions detected by the controller 106 in the previous response time window or on the expected remaining number of non-responding inverters 202 . In such embodiments, the length of the response time window may be decreased, may be increased, or may remain the same.
In block 418 , the controller 106 resets a time-out counter. As discussed below in more detail, the time-out counter is used to estimate when all of the inverters 202 of the array 102 have been discovered and responded to the controller 106 . As such, if at least one response was received in the current response time window, the controller 106 resets the time-out counter in block 418 . After the time-out counter is reset in block 418 , the method 400 loops back to block 404 in which the controller 106 broadcasts another response request, which includes the adjusted response time window length.
Referring back to block 412 , if the controller 106 determines that no response was received from any inverters 202 in the current response time window, the method 400 advances to block 420 . In block 420 , the controller 106 increments the time-out counter. As discussed above, the time-out counter is used to estimate when all of the inverters 202 of the array 102 have been discovered. As such, in block 422 , the controller 106 determines if the time-out counter is equal to a predetermined threshold value. If not, the method 400 advances to block 416 in which the response time window length is adjusted. However, if the time-out counter is determined to be equal to the predetermined threshold value in block 422 , the controller 106 determines that all of the inverters 202 of the array 102 have been discovered and ends the discovery process in block 424 . In one particular embodiment, the predetermined threshold value is set to three. As such, the controller 106 will continue to broadcast response requests until no response is received from an inverter 202 in three consecutive response time windows. Of course, other values for the predetermined threshold value may be used in other embodiments.
Referring now to FIG. 5 , each of the inverters 202 of the modules 104 of the array 102 may execute a method 500 for establishing communication with the alternative energy module array controller 106 . The method 500 begins with block 502 in which the inverter 202 performs various initialization procedures. Such initialization procedures may include initialization of registers and devices, loading of firmware and software, and/or other procedures required to configure the inverter 202 for communicating with the controller 106 . Subsequently, in block 504 , the inverter 202 determines whether a response request was received from the controller 106 . As discussed above in regard to FIG. 4 , the response request is broadcast by the controller 106 and, as such, received by each inverter 202 . If no response request has been received, the method 500 loops back to block 504 in which the inverter 202 continues to monitor for a broadcast from the controller 106 .
If, however, the inverter 202 receives a response request from the controller 106 in block 504 , the inverter 202 determines a response time to respond to the response request in block 506 . The response time is based on the length of the response time window, which is included in the response request received from the controller 106 . In the illustrative embodiment, the inverter 202 is configured to randomly determine a response time within the response time window at which to send its response to the controller 106 . Such response times may be multiples of the length of time required by the inverter 202 to send the response to the controller 106 . For example, returning to the previous example, the response time determine by the inverter 202 in block 506 may be a random integer multiple of 500 ms, which was the estimated time to transmit the response to the controller 106 . In this way, each of the inverters 202 randomly selects a timeslot of the response time window in which to send its response to the controller 106 . As such, the responses from the inverters 202 are spread across the response time window, thereby reducing the likelihood of communication collisions.
In block 508 , the inverter 202 transmits a response to the controller 106 at the response time determined in block 506 . As discussed above, the response includes identification data that uniquely identifies the responding inverter 202 from the other inverters 202 of the array 102 . Additionally, the identification data may be used by the controller 106 to send direct communications (e.g., a unicast) to the responding inverter 202 . For example, the identification data may include the MAC address of the responding inverter 202 .
After the inverter 202 has transmitted its response in block 508 , the inverter 202 determines if an acknowledgment has been received from the controller 106 in block 510 . If no acknowledgement has been received, the inverter 202 determines if a wait period has expired in block 512 . If not, the inverter 202 continues to monitor for an acknowledgement from the controller 106 in blocks 510 , 512 until an acknowledgment is received or the wait period expires. The wait period may be an arbitrary wait period, based on the response window time, or some other criteria. After the wait period expires (or other wait period lapses) with no acknowledgment received, the method 500 loops back to block 504 in which the inverter continues to monitor for response requests from the controller 106 .
Referring back to block 510 , if an acknowledgement is received from the controller 106 , the method 500 advances to block 514 . In block 514 , the inverter 202 ignores any subsequent response requests received from the controller 106 . In this way, the amount of response traffic is reduced over time as the number of acknowledged inverters increases.
In some embodiments, the discovery process may be restarted at a later time. As such, the inverter 202 determines if the discovery process has been reinitiated in block 516 . If not, the method 500 loops back to block 514 wherein the controller continues to ignore response requests from the controller 106 . However, if the discovery process has been reinitiated in block 516 , the method 500 loops back to block 504 in which the inverter continues to monitor for response requests from the controller 106 . As discussed above, the discovery process may be reinitiated after a predetermined lapse of time, in response to the array 102 being modified, or based on some other criteria.
There is a plurality of advantages of the present disclosure arising from the various features of the apparatuses, circuits, and methods described herein. It will be noted that alternative embodiments of the apparatuses, circuits, and methods of the present disclosure may not include all of the features described yet still benefit from at least some of the advantages of such features. Those of ordinary skill in the art may readily devise their own implementations of the apparatuses, circuits, and methods that incorporate one or more of the features of the present disclosure and fall within the spirit and scope of the present invention as defined by the appended claims.